Wed, Mar 9, 2016

On the GhostRider FPGA Prototype

In the GhostRider paper, we presented a memory trace oblivious system including a type-system, compiler, ISA additions, and hardware FPGA implementation. GhostRider leverages compiler and microarchitecture co-design to improve upon past systems such as Ascend and Phantom that protect against attackers snooping the off-chip DRAM address bus. By exposing on-chip scratchpads at the ISA-level, the GhostRider compiler is able to control when off-chip accesses occur, preventing timing side channels. Similarly, direct control of the placement of data in Oblivious RAM (ORAM) or Encrypted RAM (ERAM) based on static analysis of the program’s access pattern allows for improved performance with the same security guarantee as placing all data in ORAM.
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I am currently a graduate student working on a Ph.D. in Electrical & Computer Engineering in the SPARK Research Lab. I am supervised by Professor Mohit Tiwari.